{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11239246","patent":{"patent_number":"US-11239246","title":"Cell boundary structure for embedded memory","assignee":null,"inventors":[],"filing_date":"2020-04-15T00:00:00.000Z","publication_date":"2022-02-01T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"Various embodiments of the present application are directed to a method of forming an integrated circuit (IC). An isolation structure is formed between a logic region and a memory region of a substrate. A dummy structure is formed on the isolation structure and defines a dummy sidewall of the dummy structure facing the logic region. A boundary sidewall spacer is formed covering the dummy structure and at least partially defines a boundary sidewall of the boundary sidewall spacer facing the logic region. A protecting dielectric layer is formed on a top surface of the boundary sidewall spacer by converting an uppermost portion of the boundary sidewall spacer to the protecting dielectric layer. The protecting dielectric layer is removed, and a logic device structure is formed on the logic region."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Cell boundary structure for embedded memory","description":"Various embodiments of the present application are directed to a method of forming an integrated circuit (IC). An isolation structure is formed between a logic region and a memory region of a substrat","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11239246","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11239246","citation_suggestion":"Patentable. \"Cell boundary structure for embedded memory\" (US-11239246). https://patentable.app/patents/US-11239246","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11239246","json":"https://patentable.app/api/llm-context/US-11239246","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T20:32:49.569Z"}