{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11244734","patent":{"patent_number":"US-11244734","title":"Modified verify scheme for programming a memory apparatus","assignee":null,"inventors":[],"filing_date":"2019-12-27T00:00:00.000Z","publication_date":"2022-02-08T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A memory apparatus and method of operation is provided. The apparatus includes memory cells coupled to a control circuit. The control circuit is configured to perform a first programming stage including iteratively programming each of the memory cells to first program states and verifying that the memory cells have a threshold voltage above one of a plurality of first verify voltages corresponding to the first program states. The first programming stage ends before all of the memory cells are verified thereby leaving a fraction of the memory cells below the one of the plurality of first verify voltages. The control circuit also performs a second programming stage including iteratively programming each of the memory cells to second program states and verifying that at least a predetermined number of the memory cells have the threshold voltage above one of a plurality of second verify voltages corresponding to the second program states."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Modified verify scheme for programming a memory apparatus","description":"A memory apparatus and method of operation is provided. The apparatus includes memory cells coupled to a control circuit. The control circuit is configured to perform a first programming stage includi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11244734","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11244734","citation_suggestion":"Patentable. \"Modified verify scheme for programming a memory apparatus\" (US-11244734). https://patentable.app/patents/US-11244734","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11244734","json":"https://patentable.app/api/llm-context/US-11244734","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T10:10:53.978Z"}