{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11244859","patent":{"patent_number":"US-11244859","title":"Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line","assignee":null,"inventors":[],"filing_date":"2019-10-10T00:00:00.000Z","publication_date":"2022-02-08T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":7,"abstract":"Embodiments of the present invention are directed to fabrication method and resulting structures for forming interconnects using a conductive spacer configured to prevent a short between a via and an adjacent line. In a non-limiting embodiment of the invention, a first conductive line and a second conductive line are formed in a metallization layer. A conductive spacer is formed on the first conductive line and a conductive via is formed on a surface of the conductive spacer. The conductive via is positioned such that the conductive spacer is between the first conductive line and the conductive via. A height of the conductive spacer is selected to provide a predetermined distance from the conductive via to the second conductive line. The predetermined distance from the conductive via to the second conductive line is sufficient to prevent a short between the conductive via and the second conductive line."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line","description":"Embodiments of the present invention are directed to fabrication method and resulting structures for forming interconnects using a conductive spacer configured to prevent a short between a via and an ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11244859","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11244859","citation_suggestion":"Patentable. \"Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line\" (US-11244859). https://patentable.app/patents/US-11244859","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11244859","json":"https://patentable.app/api/llm-context/US-11244859","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T11:13:19.039Z"}