{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11250194","patent":{"patent_number":"US-11250194","title":"FPGA system, partial reconfiguration execution method, and storage medium","assignee":null,"inventors":[],"filing_date":"2018-12-05T00:00:00.000Z","publication_date":"2022-02-15T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":6,"abstract":"An FPGA system includes: an FPGA configured such that a partial reconfiguration is executable; and an external storage medium that is positioned outside of the FPGA and stores configuration data that is readable by the FPGA. The external storage medium stores first configuration data indicating a configuration of a circuit that is not subject to the partial reconfiguration and a second configuration data indicating a configuration of a circuit that is subject to the partial reconfiguration. The first configuration data includes configuration data indicating a configuration of a reconfiguration activation circuit for reading the second configuration data from the external storage medium and deploying the configuration indicated by the second configuration data."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"FPGA system, partial reconfiguration execution method, and storage medium","description":"An FPGA system includes: an FPGA configured such that a partial reconfiguration is executable; and an external storage medium that is positioned outside of the FPGA and stores configuration data that ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11250194","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11250194","citation_suggestion":"Patentable. \"FPGA system, partial reconfiguration execution method, and storage medium\" (US-11250194). https://patentable.app/patents/US-11250194","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11250194","json":"https://patentable.app/api/llm-context/US-11250194","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T01:59:24.134Z"}