{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11250908","patent":{"patent_number":"US-11250908","title":"Segmented reference trimming for memory arrays","assignee":null,"inventors":[],"filing_date":"2019-08-19T00:00:00.000Z","publication_date":"2022-02-15T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":20,"abstract":"A method for sensing logical states of memory cells in multiple segments in a memory device, each cell having a high- and low-resistance state, resulting in different cell current levels for the different resistance states. The method includes determining target reference current levels for the respective segments, at least two of the target reference current levels being different from each other; generating a reference current for each segment with the target reference current level for that segment; comparing the cell current level for each cell to the reference current level for the segment the cell is in; and determining the logical states of the memory cells based on the comparison."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Segmented reference trimming for memory arrays","description":"A method for sensing logical states of memory cells in multiple segments in a memory device, each cell having a high- and low-resistance state, resulting in different cell current levels for the diffe","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11250908","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11250908","citation_suggestion":"Patentable. \"Segmented reference trimming for memory arrays\" (US-11250908). https://patentable.app/patents/US-11250908","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11250908","json":"https://patentable.app/api/llm-context/US-11250908","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T13:41:11.536Z"}