{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11250927","patent":{"patent_number":"US-11250927","title":"Formal verification tool to verify hardware design of memory unit","assignee":null,"inventors":[],"filing_date":"2020-02-17T00:00:00.000Z","publication_date":"2022-02-15T00:00:00.000Z","cpc_codes":["G11C","G06F","G06F","G06F","G11C","G11C","G11C"],"num_claims":20,"abstract":"Hardware monitors which can be used by a formal verification tool to exhaustively verify a hardware design for a memory unit. The hardware monitors include detection logic to monitor one or more control signals and/or data signals of an instantiation of the memory unit to detect symbolic writes and symbolic reads. In some examples a symbolic write is a write of symbolic data to a symbolic address; and in other examples a symbolic write is a write of any data to a symbolic address. A symbolic read is a read of the symbolic address. The hardware monitors also include assertion verification logic that verifies an assertion that read data corresponding to a symbolic reads matches write data associated with one or more symbolic writes preceding the read."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Formal verification tool to verify hardware design of memory unit","description":"Hardware monitors which can be used by a formal verification tool to exhaustively verify a hardware design for a memory unit. The hardware monitors include detection logic to monitor one or more contr","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11250927","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11250927","citation_suggestion":"Patentable. \"Formal verification tool to verify hardware design of memory unit\" (US-11250927). https://patentable.app/patents/US-11250927","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11250927","json":"https://patentable.app/api/llm-context/US-11250927","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T22:36:00.657Z"}