{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11257547","patent":{"patent_number":"US-11257547","title":"Operation method for memory device","assignee":null,"inventors":[],"filing_date":"2020-11-27T00:00:00.000Z","publication_date":"2022-02-22T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G06N","G11C","G11C"],"num_claims":14,"abstract":"Provided is an operation method for a memory device, the operation method comprising: performing an erase operation; performing a verify-read operation on a memory cell to generate a cell current, the memory cell including a first transistor and a second transistor; checking whether the cell current is lower than a first cell current threshold; when the cell current is not lower than the first cell current threshold, increasing a memory gate voltage until the cell current is lower than the first cell current threshold, wherein the memory gate voltage is applied to the first transistor; fixing the memory gate voltage and increasing a drain voltage; checking whether the cell current is lower than a second cell current threshold; and if the cell current is not lower than the second cell current threshold, increasing the drain voltage until the cell current is lower than the second cell current threshold."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Operation method for memory device","description":"Provided is an operation method for a memory device, the operation method comprising: performing an erase operation; performing a verify-read operation on a memory cell to generate a cell current, the","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11257547","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11257547","citation_suggestion":"Patentable. \"Operation method for memory device\" (US-11257547). https://patentable.app/patents/US-11257547","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11257547","json":"https://patentable.app/api/llm-context/US-11257547","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T23:15:28.961Z"}