{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11257559","patent":{"patent_number":"US-11257559","title":"Test circuit, memory device, storage device, and method of operating the same","assignee":null,"inventors":[],"filing_date":"2021-01-28T00:00:00.000Z","publication_date":"2022-02-22T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"Provided herein may be a test circuit, a memory device, a storage device, and a method of operating the same. The word line test circuit may include an operation signal generator configured to generate a plurality of operation signals in response to a test command, a comparison result generator configured to, in response to the plurality of operation signals, generate a target voltage based on a test current, in which a current of a target word line varying with a test voltage is reflected, and to generate a comparison signal based on a result of a comparison between the target voltage and a reference voltage, and a word line defect detector configured to detect a defect in the target word line based on at least one reference count and a count of a reference clock, cycles of which are counted until a level of the comparison signal changes from a first level to a second level."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Test circuit, memory device, storage device, and method of operating the same","description":"Provided herein may be a test circuit, a memory device, a storage device, and a method of operating the same. The word line test circuit may include an operation signal generator configured to generat","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11257559","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11257559","citation_suggestion":"Patentable. \"Test circuit, memory device, storage device, and method of operating the same\" (US-11257559). https://patentable.app/patents/US-11257559","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11257559","json":"https://patentable.app/api/llm-context/US-11257559","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T01:59:24.037Z"}