{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11257714","patent":{"patent_number":"US-11257714","title":"Method of making a pillar structure having a non-metal sidewall protection structure and integrated circuit including the same","assignee":null,"inventors":[],"filing_date":"2015-07-21T00:00:00.000Z","publication_date":"2022-02-22T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"An integrated circuit device includes a semiconductor substrate; and a pad region over the semiconductor substrate. The integrated circuit device further includes an under-bump-metallurgy (UBM) layer over the pad region. The integrated circuit device further includes a conductive pillar on the UBM layer, wherein the conductive pillar has a sidewall surface and a top surface. The integrated circuit device further includes a protection structure over the sidewall surface of the conductive pillar, wherein sidewalls of the UBM layer are substantially free of the protection structure, and the protection structure is a non-metal material."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method of making a pillar structure having a non-metal sidewall protection structure and integrated circuit including the same","description":"An integrated circuit device includes a semiconductor substrate; and a pad region over the semiconductor substrate. The integrated circuit device further includes an under-bump-metallurgy (UBM) layer ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11257714","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11257714","citation_suggestion":"Patentable. \"Method of making a pillar structure having a non-metal sidewall protection structure and integrated circuit including the same\" (US-11257714). https://patentable.app/patents/US-11257714","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11257714","json":"https://patentable.app/api/llm-context/US-11257714","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T11:54:53.029Z"}