{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11258947","patent":{"patent_number":"US-11258947","title":"Methods and apparatus for multi-lane mapping, link training and lower power modes for a high speed bus interface","assignee":null,"inventors":[],"filing_date":"2019-12-30T00:00:00.000Z","publication_date":"2022-02-22T00:00:00.000Z","cpc_codes":["H04N","G06F","H04L","H04N","H04N","H04N","H04N","G09G","G09G","G09G"],"num_claims":20,"abstract":"Methods and apparatus for link training and low power operation. A multi-lane high speed bus is optimized for transferring audio/visual (A/V) data at slower rates. In one embodiment, the high speed bus is configured to use a packet format structure that allows for more fluid data delivery times, thereby allowing the high speed bus to deliver A/V data at times selected to reduce power consumption. In another embodiment, the high speed bus is configured to cache link initialization data for subsequent link re-initialization before entering a low power state. Thereafter, when the link exits the low power state, the high speed bus can skip certain portions of link initialization. Still a third embodiment of the present disclosure is directed to exemplary modifications to existing high speed bus link training and low power operation, consistent with the aforementioned principles. Variants of a Universal Serial Bus implementation are provided for illustration."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods and apparatus for multi-lane mapping, link training and lower power modes for a high speed bus interface","description":"Methods and apparatus for link training and low power operation. A multi-lane high speed bus is optimized for transferring audio/visual (A/V) data at slower rates. In one embodiment, the high speed bu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11258947","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11258947","citation_suggestion":"Patentable. \"Methods and apparatus for multi-lane mapping, link training and lower power modes for a high speed bus interface\" (US-11258947). https://patentable.app/patents/US-11258947","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11258947","json":"https://patentable.app/api/llm-context/US-11258947","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T15:34:03.802Z"}