{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11263515","patent":{"patent_number":"US-11263515","title":"Heterogeneous processor architecture for integrating CNN and RNN into single high-performance, low-power chip","assignee":null,"inventors":[],"filing_date":"2018-02-05T00:00:00.000Z","publication_date":"2022-03-01T00:00:00.000Z","cpc_codes":["G06N","G06N","G06N","G06N"],"num_claims":6,"abstract":"A heterogeneous processor architecture for integrating a convolutional neural network (CNN) and a recurrent neural network (RNN) into a single high-performance, low-power chip in a neural network processor architecture, the heterogeneous processor architecture includes: an on-chip integrated circuit including a CNN operator for processing the CNN, an RNN operator for processing the RNN, an operation controller for performing control, a memory for storing data which is to be used by the operators, an interface for externally exchanging data, and a data bus through which data moves between constituent elements, wherein a fully-connected layer constituting the CNN performs data processing by sharing the RNN operator."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Heterogeneous processor architecture for integrating CNN and RNN into single high-performance, low-power chip","description":"A heterogeneous processor architecture for integrating a convolutional neural network (CNN) and a recurrent neural network (RNN) into a single high-performance, low-power chip in a neural network proc","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11263515","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11263515","citation_suggestion":"Patentable. \"Heterogeneous processor architecture for integrating CNN and RNN into single high-performance, low-power chip\" (US-11263515). https://patentable.app/patents/US-11263515","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11263515","json":"https://patentable.app/api/llm-context/US-11263515","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T08:35:04.118Z"}