{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11264086","patent":{"patent_number":"US-11264086","title":"Memory controller and operating method thereof","assignee":null,"inventors":[],"filing_date":"2020-04-06T00:00:00.000Z","publication_date":"2022-03-01T00:00:00.000Z","cpc_codes":["G06F","G11C","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A memory controller capable of sequentially increasing or decreasing a total current consumed by a plurality of memory devices, controls a plurality of memory devices coupled through a plurality of channels. The memory controller includes a request checker for identifying memory devices corresponding to requests received from a host among the plurality of memory devices, and generating the identified device information on memory devices to perform operations corresponding to the requests; a dummy manager for outputting a request for controlling a dummy pulse to be applied to channels of selected memory devices according to the device information among the plurality of channels; and a dummy pulse generator for sequentially applying the dummy pulse to the channels coupled to the selected memory devices, based on the request for controlling the dummy pulse."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory controller and operating method thereof","description":"A memory controller capable of sequentially increasing or decreasing a total current consumed by a plurality of memory devices, controls a plurality of memory devices coupled through a plurality of ch","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11264086","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11264086","citation_suggestion":"Patentable. \"Memory controller and operating method thereof\" (US-11264086). https://patentable.app/patents/US-11264086","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11264086","json":"https://patentable.app/api/llm-context/US-11264086","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T13:13:56.903Z"}