{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11264395","patent":{"patent_number":"US-11264395","title":"Vertical transistor, integrated circuitry, method of forming a vertical transistor, and method of forming integrated circuitry","assignee":null,"inventors":[],"filing_date":"2020-09-21T00:00:00.000Z","publication_date":"2022-03-01T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":24,"abstract":"A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Vertical transistor, integrated circuitry, method of forming a vertical transistor, and method of forming integrated circuitry","description":"A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate op","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11264395","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11264395","citation_suggestion":"Patentable. \"Vertical transistor, integrated circuitry, method of forming a vertical transistor, and method of forming integrated circuitry\" (US-11264395). https://patentable.app/patents/US-11264395","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11264395","json":"https://patentable.app/api/llm-context/US-11264395","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T13:41:21.982Z"}