{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11265140","patent":{"patent_number":"US-11265140","title":"High performance phase locked loop","assignee":null,"inventors":[],"filing_date":"2020-03-09T00:00:00.000Z","publication_date":"2022-03-01T00:00:00.000Z","cpc_codes":["H04L","H02M","H04L","H04L"],"num_claims":14,"abstract":"Methods and systems are described for receiving N phases of a local clock signal and M phases of a reference signal, wherein M is an integer greater than or equal to 1 and N is an integer greater than or equal to 2, generating a plurality of partial phase error signals, each partial phase error signal formed at least in part by comparing (i) a respective phase of the M phases of the reference signal to (ii) a respective phase of the N phases of the local clock signal, and generating a composite phase error signal by summing the plurality of partial phase error signals, and responsively adjusting a fixed phase of a local oscillator using the composite phase error signal."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"High performance phase locked loop","description":"Methods and systems are described for receiving N phases of a local clock signal and M phases of a reference signal, wherein M is an integer greater than or equal to 1 and N is an integer greater than","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11265140","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11265140","citation_suggestion":"Patentable. \"High performance phase locked loop\" (US-11265140). https://patentable.app/patents/US-11265140","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11265140","json":"https://patentable.app/api/llm-context/US-11265140","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:47:02.206Z"}