{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11269553","patent":{"patent_number":"US-11269553","title":"Adjusting scan event thresholds to mitigate memory errors","assignee":null,"inventors":[],"filing_date":"2020-05-19T00:00:00.000Z","publication_date":"2022-03-08T00:00:00.000Z","cpc_codes":["G06F","G11C","G06F","G06F","G06F","G11C"],"num_claims":20,"abstract":"Systems and methods are disclosed, comprising a memory device comprising multiple groups of memory cells, the groups comprising a first group of memory cells and a second group of memory cells configured to store information at a same bit capacity per memory cell, and a processing device operably coupled to the memory device, the processing device configured to adjust a scan event threshold for one of the first or second groups of memory cells to a threshold less than a target scan event threshold for the first and second groups of memory cells to distribute scan events in time on the memory device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Adjusting scan event thresholds to mitigate memory errors","description":"Systems and methods are disclosed, comprising a memory device comprising multiple groups of memory cells, the groups comprising a first group of memory cells and a second group of memory cells configu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11269553","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11269553","citation_suggestion":"Patentable. \"Adjusting scan event thresholds to mitigate memory errors\" (US-11269553). https://patentable.app/patents/US-11269553","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11269553","json":"https://patentable.app/api/llm-context/US-11269553","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T03:35:32.967Z"}