{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11269648","patent":{"patent_number":"US-11269648","title":"Apparatuses and methods for ordering bits in a memory device","assignee":null,"inventors":[],"filing_date":"2020-10-08T00:00:00.000Z","publication_date":"2022-03-08T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G11C","G11C","G11C","G11C","G06F"],"num_claims":18,"abstract":"Systems, apparatuses, and methods for organizing bits in a memory device are described. In a number of embodiments, an apparatus can include an array of memory cells, a data interface, a multiplexer coupled between the array of memory cells and the data interface, and a controller coupled to the array of memory cells, the controller configured to cause the apparatus to latch bits associated with a row of memory cells in the array in a number of sense amplifiers in a prefetch operation and send the bits from the sense amplifiers, through a multiplexer, to a data interface, which may include or be referred to as DQs. The bits may be sent to the DQs in a particular order that may correspond to a particular matrix configuration and may thus facilitate or reduce the complexity of arithmetic operations performed on the data."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Apparatuses and methods for ordering bits in a memory device","description":"Systems, apparatuses, and methods for organizing bits in a memory device are described. In a number of embodiments, an apparatus can include an array of memory cells, a data interface, a multiplexer c","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11269648","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11269648","citation_suggestion":"Patentable. \"Apparatuses and methods for ordering bits in a memory device\" (US-11269648). https://patentable.app/patents/US-11269648","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11269648","json":"https://patentable.app/api/llm-context/US-11269648","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T12:19:35.474Z"}