{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11270411","patent":{"patent_number":"US-11270411","title":"Efficient hardware design and implementation of image interpolation and resizing for image processing pipeline","assignee":null,"inventors":[],"filing_date":"2019-03-29T00:00:00.000Z","publication_date":"2022-03-08T00:00:00.000Z","cpc_codes":["G06T","G06F","G06F","G06F","G06T","G06T"],"num_claims":17,"abstract":"A system for real time bilinear interpolation includes a bilinear interpolation module capable of: generating pixel addresses for original image pixels of an original image needed for performing bilinear interpolation of the original image to form a resized image, wherein the generated pixel addresses assume all the original image pixels of the original image are accessible, and performing bilinear interpolation, and a pixel smart memory module capable: of sequentially receiving original image pixel rows of the original image an original image pixel row a time, predicting which original image pixel rows are needed for performing bilinear interpolation, storing only the needed sequentially received original image pixel rows in a memory, decoding the generated pixel addresses to form decoded addresses to access the needed original image pixel rows stored in the memory, and sending the needed original image pixel rows to the bilinear interpolation module for performing bilinear interpolation."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Efficient hardware design and implementation of image interpolation and resizing for image processing pipeline","description":"A system for real time bilinear interpolation includes a bilinear interpolation module capable of: generating pixel addresses for original image pixels of an original image needed for performing bilin","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11270411","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11270411","citation_suggestion":"Patentable. \"Efficient hardware design and implementation of image interpolation and resizing for image processing pipeline\" (US-11270411). https://patentable.app/patents/US-11270411","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11270411","json":"https://patentable.app/api/llm-context/US-11270411","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:20:18.818Z"}