{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11270982","patent":{"patent_number":"US-11270982","title":"Method of manufacturing power semiconductor device and power semiconductor device","assignee":null,"inventors":[],"filing_date":"2017-01-30T00:00:00.000Z","publication_date":"2022-03-08T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":7,"abstract":"A metal mask is disposed on a copper base plate. A solder paste is introduced into each of a plurality of openings in the metal mask, to thereby form a pattern of the solder paste on each of copper plates of the copper base plate. A semiconductor element and a conductive component are placed on the respective patterns of the solder pastes. A metal mask is disposed on the copper base plate. Then, a solder paste is introduced into each of a plurality of openings in the metal mask, to thereby form a pattern of the solder paste covering each of the semiconductor element and the conductive component. A large-capacity relay board is disposed so as to come into contact with a corresponding pattern of the solder paste. A power semiconductor device is completed by performing heat treatment under a temperature condition of 200° C. or higher."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method of manufacturing power semiconductor device and power semiconductor device","description":"A metal mask is disposed on a copper base plate. A solder paste is introduced into each of a plurality of openings in the metal mask, to thereby form a pattern of the solder paste on each of copper pl","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11270982","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11270982","citation_suggestion":"Patentable. \"Method of manufacturing power semiconductor device and power semiconductor device\" (US-11270982). https://patentable.app/patents/US-11270982","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11270982","json":"https://patentable.app/api/llm-context/US-11270982","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:29:24.162Z"}