{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11275590","patent":{"patent_number":"US-11275590","title":"Device and processing architecture for resolving execution pipeline dependencies without requiring no operation instructions in the instruction memory","assignee":null,"inventors":[],"filing_date":"2016-03-11T00:00:00.000Z","publication_date":"2022-03-15T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":27,"abstract":"Different processor architectures are described to evaluate and track dependencies required by instructions. The processors may hold or queue instructions that require output of other instructions until required data and resources are available which may remove the requirement of NOPs in the instruction memory to resolve dependencies and pipeline hazards. The processor may divide instruction data into bundles for parallel execution and provide speculative execution. The processor may include various components to implement an evaluation unit, execution unit and termination unit."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Device and processing architecture for resolving execution pipeline dependencies without requiring no operation instructions in the instruction memory","description":"Different processor architectures are described to evaluate and track dependencies required by instructions. The processors may hold or queue instructions that require output of other instructions unt","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11275590","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11275590","citation_suggestion":"Patentable. \"Device and processing architecture for resolving execution pipeline dependencies without requiring no operation instructions in the instruction memory\" (US-11275590). https://patentable.app/patents/US-11275590","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11275590","json":"https://patentable.app/api/llm-context/US-11275590","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T09:41:01.804Z"}