{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11275651","patent":{"patent_number":"US-11275651","title":"Memory controller and flash memory system","assignee":null,"inventors":[],"filing_date":"2021-01-29T00:00:00.000Z","publication_date":"2022-03-15T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F"],"num_claims":6,"abstract":"A memory controller includes a control circuit. The control circuit sets each block in a flash memory to an SLC mode or an MLC mode. The control circuit configures blocks set to the SLC mode into a first group. The control circuit configures blocks set to the MLC mode into a second group. The control circuit allocates the blocks constituting the first group to a first data block and a first redundant block. The control circuit allocates the blocks constituting the second group to a second data block and a second redundant block. The control circuit writes data required to be saved into the first data block. The control circuit writes first redundant data into the first redundant block. The control circuit writes replicated data of the data written into the first data block into the second data block. The control circuit writes second redundant data into the second redundant block."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory controller and flash memory system","description":"A memory controller includes a control circuit. The control circuit sets each block in a flash memory to an SLC mode or an MLC mode. The control circuit configures blocks set to the SLC mode into a fi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11275651","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11275651","citation_suggestion":"Patentable. \"Memory controller and flash memory system\" (US-11275651). https://patentable.app/patents/US-11275651","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11275651","json":"https://patentable.app/api/llm-context/US-11275651","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T09:17:12.789Z"}