{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11276454","patent":{"patent_number":"US-11276454","title":"Memory with partial array refresh","assignee":null,"inventors":[],"filing_date":"2020-07-27T00:00:00.000Z","publication_date":"2022-03-15T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"Memory devices and systems with partial array refresh control over memory regions in a memory array, and associated methods, are disclosed herein. In one embodiment, a memory device includes a memory array having a first memory region and a second memory region. The memory device is configured to write data to the memory array in accordance with a programming sequence by initially writing data to unutilized memory cells of the first memory region before initially writing data to unutilized memory cells of the second memory region. The memory device is further configured to determine that the data stored on the first and/or second memory regions is not consolidated, and to consolidate at least a portion of the data by rewriting the portion of the data to physically or logically contiguous memory cells of the first memory region and/or the second memory region."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory with partial array refresh","description":"Memory devices and systems with partial array refresh control over memory regions in a memory array, and associated methods, are disclosed herein. In one embodiment, a memory device includes a memory ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11276454","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11276454","citation_suggestion":"Patentable. \"Memory with partial array refresh\" (US-11276454). https://patentable.app/patents/US-11276454","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11276454","json":"https://patentable.app/api/llm-context/US-11276454","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T22:36:24.689Z"}