{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11281604","patent":{"patent_number":"US-11281604","title":"Multiple memory type shared memory bus systems and methods","assignee":null,"inventors":[],"filing_date":"2020-02-28T00:00:00.000Z","publication_date":"2022-03-22T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":22,"abstract":"Techniques for implementing and/or operating an apparatus, which includes a host system, a memory system, and a shared memory bus. The memory system includes a first memory type that is subject to a first memory type-specific timing constraint and a second memory type that is subject to a second memory type-specific timing constraint. Additionally, the shared memory bus is shared by the first memory type and the second memory type. Furthermore, the apparatus utilizes a first time period to communicate with the first memory type via the shared memory bus at least in part by enforcing the first memory type-specific timing constraint during the first time period and utilizes a second time period to communicate with the second memory type via the shared memory bus at least in part by enforcing the second memory type-specific timing constraint during the second time period."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Multiple memory type shared memory bus systems and methods","description":"Techniques for implementing and/or operating an apparatus, which includes a host system, a memory system, and a shared memory bus. The memory system includes a first memory type that is subject to a f","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11281604","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11281604","citation_suggestion":"Patentable. \"Multiple memory type shared memory bus systems and methods\" (US-11281604). https://patentable.app/patents/US-11281604","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11281604","json":"https://patentable.app/api/llm-context/US-11281604","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:52:02.887Z"}