{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11281832","patent":{"patent_number":"US-11281832","title":"Device for generating verification vector for circuit design verification, circuit design system, and reinforcement learning method of the device and the circuit design system","assignee":null,"inventors":[],"filing_date":"2020-02-12T00:00:00.000Z","publication_date":"2022-03-22T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06N"],"num_claims":12,"abstract":"A device for verifying a circuit design including a first circuit block and a second circuit block includes a verification vector generator and a design verifier. The verification vector generator determines a first verification vector by performing reinforcement learning through neural network computation based on a coverage corresponding to a first test vector, the coverage being determined based on a state transition of the first circuit block generated by inputting the first test vector to the first circuit block. The design verifier performs design verification for the first circuit block by using the first verification vector."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Device for generating verification vector for circuit design verification, circuit design system, and reinforcement learning method of the device and the circuit design system","description":"A device for verifying a circuit design including a first circuit block and a second circuit block includes a verification vector generator and a design verifier. The verification vector generator det","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11281832","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11281832","citation_suggestion":"Patentable. \"Device for generating verification vector for circuit design verification, circuit design system, and reinforcement learning method of the device and the circuit design system\" (US-11281832). https://patentable.app/patents/US-11281832","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11281832","json":"https://patentable.app/api/llm-context/US-11281832","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T12:00:39.282Z"}