{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11282575","patent":{"patent_number":"US-11282575","title":"Nonvolatile memory device and method of programming in the same","assignee":null,"inventors":[],"filing_date":"2020-08-31T00:00:00.000Z","publication_date":"2022-03-22T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"In a method of programming in a nonvolatile memory device including a memory cell region including a first metal pad and a peripheral circuit region including a second metal pad, wherein the peripheral circuit region is vertically connected to the memory cell region by the first metal pad and the second metal pad, a memory block in the memory cell region including a plurality of stacks disposed in a vertical direction is provided where the memory block includes cell strings each of which includes memory cells connected in series in the vertical direction between a source line and each of bitlines. A plurality of intermediate switching transistors disposed in a boundary portion between two adjacent stacks in the vertical direction is provided, where the intermediate switching transistors perform a switching operation to control electrical connection of the cell strings, respectively. A boosting operation is performed to boost voltages of channels of the plurality of stacks while controlling the switching operation of the intermediate switching transistors during a program operation with respect to the memory block. Program voltage disturbance and pass voltage disturbance are reduced through control of the switching operation of the intermediate switching transistors."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Nonvolatile memory device and method of programming in the same","description":"In a method of programming in a nonvolatile memory device including a memory cell region including a first metal pad and a peripheral circuit region including a second metal pad, wherein the periphera","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11282575","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11282575","citation_suggestion":"Patentable. \"Nonvolatile memory device and method of programming in the same\" (US-11282575). https://patentable.app/patents/US-11282575","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11282575","json":"https://patentable.app/api/llm-context/US-11282575","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:23:19.008Z"}