{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11282740","patent":{"patent_number":"US-11282740","title":"Bulk semiconductor structure with a multi-level polycrystalline semiconductor region and method","assignee":null,"inventors":[],"filing_date":"2020-08-13T00:00:00.000Z","publication_date":"2022-03-22T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L"],"num_claims":20,"abstract":"Disclosed is a bulk semiconductor structure that includes a semiconductor substrate with a multi-level polycrystalline semiconductor region that includes one or more first-level portions (i.e., buried portions) and one or more second-level portions (i.e., non-buried portions). Each first-level portion can be within the semiconductor substrate some distance below the top surface (i.e., buried), can be aligned below a monocrystalline semiconductor region and/or a trench isolation region, and can have a first maximum depth. Each second-level portion can be within the semiconductor substrate at the top surface, can be positioned laterally adjacent to a trench isolation region, and can have a second maximum depth that is less than the first maximum depth. Also disclosed herein are method embodiments for forming the bulk semiconductor structure wherein the first-level and second-level portions of the multi-level polycrystalline semiconductor region are concurrently formed (e.g., using a single module)."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Bulk semiconductor structure with a multi-level polycrystalline semiconductor region and method","description":"Disclosed is a bulk semiconductor structure that includes a semiconductor substrate with a multi-level polycrystalline semiconductor region that includes one or more first-level portions (i.e., buried","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11282740","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11282740","citation_suggestion":"Patentable. \"Bulk semiconductor structure with a multi-level polycrystalline semiconductor region and method\" (US-11282740). https://patentable.app/patents/US-11282740","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11282740","json":"https://patentable.app/api/llm-context/US-11282740","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T20:33:15.970Z"}