{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11288192","patent":{"patent_number":"US-11288192","title":"Memory controlling device and memory system including the same","assignee":null,"inventors":[],"filing_date":"2020-04-28T00:00:00.000Z","publication_date":"2022-03-29T00:00:00.000Z","cpc_codes":["G06F","G11C","G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G06F","G06F","G06F","G11C","G11C","G11C"],"num_claims":14,"abstract":"A memory controlling device configured to connect to a memory module including a resistance switching memory cell array which is partitioned into a plurality of partitions including a first partition and a second partition is provided. A first controlling module accesses the memory module. A second controlling module determines whether there is a conflict for the first partition to which a read request targets when an incoming request is the read request, instructs the first controlling module to read target data of the read request from the memory module when a write to the second partition is in progress, and suspends the read request when a write to the first partition is in progress."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory controlling device and memory system including the same","description":"A memory controlling device configured to connect to a memory module including a resistance switching memory cell array which is partitioned into a plurality of partitions including a first partition ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11288192","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11288192","citation_suggestion":"Patentable. \"Memory controlling device and memory system including the same\" (US-11288192). https://patentable.app/patents/US-11288192","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11288192","json":"https://patentable.app/api/llm-context/US-11288192","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:07:41.037Z"}