{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11288204","patent":{"patent_number":"US-11288204","title":"Logical and physical address field size reduction by alignment-constrained writing technique","assignee":null,"inventors":[],"filing_date":"2020-07-17T00:00:00.000Z","publication_date":"2022-03-29T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":22,"abstract":"A method and arrangement are disclosed involving receiving a read-type command at a data storage arrangement, calculating a command span of the received read-type command and performing a look-up command, through use of a processor, for data located in each extent at a condensed logical block address state table for the read-type command, wherein the condensed logical block address state table describes a logical to physical table and at least one of transmitting data and displaying data related to the read-type command found in the condensed logical block address state table."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Logical and physical address field size reduction by alignment-constrained writing technique","description":"A method and arrangement are disclosed involving receiving a read-type command at a data storage arrangement, calculating a command span of the received read-type command and performing a look-up comm","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11288204","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11288204","citation_suggestion":"Patentable. \"Logical and physical address field size reduction by alignment-constrained writing technique\" (US-11288204). https://patentable.app/patents/US-11288204","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11288204","json":"https://patentable.app/api/llm-context/US-11288204","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T09:41:00.520Z"}