{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11289377","patent":{"patent_number":"US-11289377","title":"Semiconductor chip suitable for 2.5D and 3D packaging integration and methods of forming the same","assignee":null,"inventors":[],"filing_date":"2019-12-03T00:00:00.000Z","publication_date":"2022-03-29T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":21,"abstract":"The present disclosure relates to a fabrication process of a semiconductor chip, which starts with providing a precursor wafer mounted on a carrier. The precursor wafer includes a precursor substrate and component portions between the carrier and the precursor substrate. The precursor substrate is then thinned down to provide a thinned substrate, which includes a substrate base adjacent to the component portions and an etchable region over the substrate base. Next, the etchable region is selectively etched to generate a number of protrusions over the substrate base. Herein, the substrate base is retained, and portions of the substrate base are exposed through the protrusions. Each protrusion protrudes from the substrate base and has a same height. A metal layer is then applied to provide a semiconductor wafer. The metal layer selectively covers the exposed portions of the substrate base and covers at least a portion of each protrusion."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor chip suitable for 2.5D and 3D packaging integration and methods of forming the same","description":"The present disclosure relates to a fabrication process of a semiconductor chip, which starts with providing a precursor wafer mounted on a carrier. The precursor wafer includes a precursor substrate ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11289377","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11289377","citation_suggestion":"Patentable. \"Semiconductor chip suitable for 2.5D and 3D packaging integration and methods of forming the same\" (US-11289377). https://patentable.app/patents/US-11289377","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11289377","json":"https://patentable.app/api/llm-context/US-11289377","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:46:22.504Z"}