{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11289382","patent":{"patent_number":"US-11289382","title":"Method for forming transistor with strained channel","assignee":null,"inventors":[],"filing_date":"2020-12-15T00:00:00.000Z","publication_date":"2022-03-29T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":8,"abstract":"A method of forming a semiconductor structure. A first sacrificial gate is formed on a substrate. A spacer is formed on a sidewall of the first sacrificial gate. In the substrate, adjacent to the first sacrificial gate, a source region and a drain region are formed. A channel region is formed between the source region and the drain region. The first sacrificial gate is removed, and a gate trench is formed on the channel region between the spacers. The substrate is etched via the gate trench, thereby forming a recessed trench between the source region and the drain region, and extending into the substrate. The recessed trench has a hexagonal cross-sectional profile. A stress inducing material layer is then formed in the recessed trench. A channel layer is epitaxially grown on the stress inducing material layer. A gate structure is formed on the channel layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for forming transistor with strained channel","description":"A method of forming a semiconductor structure. A first sacrificial gate is formed on a substrate. A spacer is formed on a sidewall of the first sacrificial gate. In the substrate, adjacent to the firs","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11289382","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11289382","citation_suggestion":"Patentable. \"Method for forming transistor with strained channel\" (US-11289382). https://patentable.app/patents/US-11289382","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11289382","json":"https://patentable.app/api/llm-context/US-11289382","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T09:55:15.892Z"}