{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11294692","patent":{"patent_number":"US-11294692","title":"Basic input output system (BIOS)—identified memory size and node address range mirroring system","assignee":null,"inventors":[],"filing_date":"2020-07-27T00:00:00.000Z","publication_date":"2022-04-05T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G11C","G11C","H01L"],"num_claims":20,"abstract":"An address range mirroring system includes a plurality of processing subsystem/memory subsystem nodes that each include a respective processing subsystem coupled to a respective memory subsystem, an operating system provided by at least one of the plurality of processing subsystem/memory subsystem nodes, and a Basic Input/Output System (BIOS) that is coupled to the plurality of processing subsystem/memory subsystem nodes. The BIOS identifies an address range mirroring memory size that was provided by the operating system, and an address range mirroring node usage identification that was provided by the operating system. The BIOS then configures address range mirroring according to the address range mirroring memory size in the respective memory subsystem in each of a subset of the plurality of processing subsystem/memory subsystem nodes, with the subset of the plurality of processing subsystem/memory subsystem nodes based on the address range mirroring node usage identification."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Basic input output system (BIOS)—identified memory size and node address range mirroring system","description":"An address range mirroring system includes a plurality of processing subsystem/memory subsystem nodes that each include a respective processing subsystem coupled to a respective memory subsystem, an o","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11294692","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11294692","citation_suggestion":"Patentable. \"Basic input output system (BIOS)—identified memory size and node address range mirroring system\" (US-11294692). https://patentable.app/patents/US-11294692","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11294692","json":"https://patentable.app/api/llm-context/US-11294692","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:09:11.604Z"}