{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11294824","patent":{"patent_number":"US-11294824","title":"System and method for reduced latency of read-modify-write operations","assignee":null,"inventors":[],"filing_date":"2020-01-03T00:00:00.000Z","publication_date":"2022-04-05T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":15,"abstract":"Aspects of a storage device including a memory and a controller are provided which allows for reduced latency of read-modify-write operations when a data length from a host is unaligned at two ends with a write length of the controller. When the controller receives from a host device a write command for data, the controller performs a first read of a head portion and a second read of a tail portion immediately after performing the first read. The controller performs a single L2P translation of one of the head or tail portions, senses the data associated with the head and tail portions once into latches, and reads the data from the latches for both the head and tail portions without performing another data sense. The controller then writes the data in response to the write command after performing the first read and the second read."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"System and method for reduced latency of read-modify-write operations","description":"Aspects of a storage device including a memory and a controller are provided which allows for reduced latency of read-modify-write operations when a data length from a host is unaligned at two ends wi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11294824","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11294824","citation_suggestion":"Patentable. \"System and method for reduced latency of read-modify-write operations\" (US-11294824). https://patentable.app/patents/US-11294824","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11294824","json":"https://patentable.app/api/llm-context/US-11294824","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:15:26.884Z"}