{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11302380","patent":{"patent_number":"US-11302380","title":"Memory controller device and phase calibration method","assignee":null,"inventors":[],"filing_date":"2020-12-14T00:00:00.000Z","publication_date":"2022-04-12T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A memory controller device includes a delay line circuitry, data sampler circuits, phase detector circuits, and a control logic circuit. The delay line circuitry delays a data strobe signal to generate first to third clock signals, in which the second clock signal is for reading a data signal, and phases of the first to the third clock signals are sequentially differentiated by a predetermined value. The data sampler circuits sample the data signal according to the first to the third clock signals, in order to generate first to third signals. The phase detector circuits compare the first signal with the second signal to generate a first detection signal, and compare the third signal with the second signal to generate a second detection signal. The control logic circuit adjusts the first to the third clock signals according to the first and the second detection signals."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory controller device and phase calibration method","description":"A memory controller device includes a delay line circuitry, data sampler circuits, phase detector circuits, and a control logic circuit. The delay line circuitry delays a data strobe signal to generat","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11302380","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11302380","citation_suggestion":"Patentable. \"Memory controller device and phase calibration method\" (US-11302380). https://patentable.app/patents/US-11302380","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11302380","json":"https://patentable.app/api/llm-context/US-11302380","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:11:45.451Z"}