{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11302617","patent":{"patent_number":"US-11302617","title":"Scalable semiconductor interposer integration","assignee":null,"inventors":[],"filing_date":"2019-12-22T00:00:00.000Z","publication_date":"2022-04-12T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":17,"abstract":"An electronic package comprising a first substrate that includes a first plurality of substrate vias and one or more cavities, a second substrate that includes a second plurality of substrate vias and one or more cavities, and a standoff substrate(s). The standoff substrate(s)positioned between the first and second substrate, the standoff substrate(s) is affixed to each of the first and second substrate, standoff substrate(s) forms a clearance between the first and second substrate, the standoff substrate(s) comprises an intervening plurality of substrate vias passing through the entire thickness of the standoff substrate(s), and a portion of the second plurality of substrate vias are configured to be or capable of being electrically connected to a portion of the first plurality of substrate vias by way of a portion of the intervening plurality of substrate vias."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Scalable semiconductor interposer integration","description":"An electronic package comprising a first substrate that includes a first plurality of substrate vias and one or more cavities, a second substrate that includes a second plurality of substrate vias and","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11302617","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11302617","citation_suggestion":"Patentable. \"Scalable semiconductor interposer integration\" (US-11302617). https://patentable.app/patents/US-11302617","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11302617","json":"https://patentable.app/api/llm-context/US-11302617","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T17:26:08.225Z"}