{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11304290","patent":{"patent_number":"US-11304290","title":"Semiconductor structures and methods","assignee":null,"inventors":[],"filing_date":"2017-08-10T00:00:00.000Z","publication_date":"2022-04-12T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A method includes attaching a substrate to a carrier, aligning external connectors on a first surface of a first semiconductor package to first conductive pads on a first surface of the substrate facing away from the carrier, and performing a reflow process, where a difference in coefficients of thermal expansion (CTEs) between the substrate and the carrier causes a first shape for the first surface of the substrate during the reflow process, where differences among CTEs of materials of the first semiconductor package causes a second shape for the first surface of the first semiconductor package during the reflow process, and wherein the first shape substantially matches the second shape. The method further includes removing the carrier from the substrate after the reflow process."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor structures and methods","description":"A method includes attaching a substrate to a carrier, aligning external connectors on a first surface of a first semiconductor package to first conductive pads on a first surface of the substrate faci","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11304290","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11304290","citation_suggestion":"Patentable. \"Semiconductor structures and methods\" (US-11304290). https://patentable.app/patents/US-11304290","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11304290","json":"https://patentable.app/api/llm-context/US-11304290","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:36:59.908Z"}