{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11307771","patent":{"patent_number":"US-11307771","title":"Configurable link interfaces for a memory device","assignee":null,"inventors":[],"filing_date":"2020-07-10T00:00:00.000Z","publication_date":"2022-04-19T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G06F","G06F"],"num_claims":24,"abstract":"Techniques for configurable link interfaces for a memory device are described. In some examples, memory devices may require periodic link training to support data transfer with a host device at relatively fast rates. However, in some managed memory applications, memory dies of a memory device may have integrated controllers that do not support such link training, and accordingly may not support some clock rates or data rates. To support data transfers between a host device and a memory device at relatively fast clock rates or data rates without link training, a memory die may be fabricated with a configurable link interface that can support different mappings between components and operation according to different clock rates or data rates. In some examples, a memory die may be fabricated in a manner that supports configurable mappings between an array and a data channel interface that are operable according to different multiplexing and serialization."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Configurable link interfaces for a memory device","description":"Techniques for configurable link interfaces for a memory device are described. In some examples, memory devices may require periodic link training to support data transfer with a host device at relati","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11307771","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11307771","citation_suggestion":"Patentable. \"Configurable link interfaces for a memory device\" (US-11307771). https://patentable.app/patents/US-11307771","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11307771","json":"https://patentable.app/api/llm-context/US-11307771","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T10:40:55.406Z"}