{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11461622","patent":{"patent_number":"US-11461622","title":"Dynamic code loading for multiple executions on a sequential processor","assignee":null,"inventors":[],"filing_date":"2019-06-28T00:00:00.000Z","publication_date":"2022-10-04T00:00:00.000Z","cpc_codes":["G06F","G06N","G06N","G06N","G06N","G06N","G06F"],"num_claims":20,"abstract":"Embodiments include techniques for enabling execution of N inferences on an execution engine of a neural network device. Instruction code for a single inference is stored in a memory that is accessible by a DMA engine, the instruction code forming a regular code block. A NOP code block and a reset code block for resetting an instruction DMA queue are stored in the memory. The instruction DMA queue is generated such that, when it is executed by the DMA engine, it causes the DMA engine to copy, for each of N inferences, both the regular code block and an additional code block to an instruction buffer. The additional code block is the NOP code block for the first N−1 inferences and is the reset code block for the Nth inference. When the reset code block is executed by the execution engine, the instruction DMA queue is reset."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Dynamic code loading for multiple executions on a sequential processor","description":"Embodiments include techniques for enabling execution of N inferences on an execution engine of a neural network device. Instruction code for a single inference is stored in a memory that is accessibl","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11461622","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11461622","citation_suggestion":"Patentable. \"Dynamic code loading for multiple executions on a sequential processor\" (US-11461622). https://patentable.app/patents/US-11461622","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11461622","json":"https://patentable.app/api/llm-context/US-11461622","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:19:19.332Z"}