{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11462262","patent":{"patent_number":"US-11462262","title":"SRAM architecture","assignee":null,"inventors":[],"filing_date":"2020-10-02T00:00:00.000Z","publication_date":"2022-10-04T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":16,"abstract":"The present invention relates generally to the field of semiconductor memories and in particular to memory cells comprising a static random access memory (SRAM) bitcell (100). Leakage current in the read path is reduced by connecting a read access transistor terminal either to GND or VDD during read access or write access and idle state. The SRAM cell inverters may be asymmetrical in size. The memory may comprise various boost circuits to allow low voltage operation or application of distinguished supply voltages."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"SRAM architecture","description":"The present invention relates generally to the field of semiconductor memories and in particular to memory cells comprising a static random access memory (SRAM) bitcell (100). Leakage current in the r","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11462262","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11462262","citation_suggestion":"Patentable. \"SRAM architecture\" (US-11462262). https://patentable.app/patents/US-11462262","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11462262","json":"https://patentable.app/api/llm-context/US-11462262","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T07:59:33.405Z"}