{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11462292","patent":{"patent_number":"US-11462292","title":"Error correction circuit of semiconductor memory device and semiconductor memory device including the same","assignee":null,"inventors":[],"filing_date":"2021-04-12T00:00:00.000Z","publication_date":"2022-10-04T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"An error correction circuit includes ECC encoder and an ECC decoder. The ECC encoder generates, based on a first main data obtained by selectively shifting data bits of a main data based on a LSB of a row address, a parity data using an ECC and stores a codeword including the main data and the parity data in a target page. The ECC decoder generates a syndrome based on a second main data obtained by selectively shifting data bits of the main data based on the LSB of the row address, the parity data and a parity check matrix based on the ECC, and corrects a single bit error or corrects two bit errors when the two bit errors occur in adjacent two memory cells based on the syndrome. The mis-corrected bit is generated when the multiple error bits are present in the main data."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Error correction circuit of semiconductor memory device and semiconductor memory device including the same","description":"An error correction circuit includes ECC encoder and an ECC decoder. The ECC encoder generates, based on a first main data obtained by selectively shifting data bits of a main data based on a LSB of a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11462292","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11462292","citation_suggestion":"Patentable. \"Error correction circuit of semiconductor memory device and semiconductor memory device including the same\" (US-11462292). https://patentable.app/patents/US-11462292","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11462292","json":"https://patentable.app/api/llm-context/US-11462292","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:22:28.846Z"}