{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11463187","patent":{"patent_number":"US-11463187","title":"Fault tolerant design for clock-synchronization systems","assignee":null,"inventors":[],"filing_date":"2020-11-06T00:00:00.000Z","publication_date":"2022-10-04T00:00:00.000Z","cpc_codes":["G06F","H04J","H04J","H04J","H04L","H04L"],"num_claims":20,"abstract":"A system is provided for synchronizing clocks. The system includes a plurality of devices in a network, each device having a local clock. The system is configured to synchronize the local clocks according to a primary spanning tree, where the primary spanning tree has a plurality of nodes connected through a plurality of primary links, each node of the plurality of nodes representing a respective device of the plurality of devices. The system is also configured to compute a backup spanning tree before a failure is detected in the primary spanning tree, wherein the backup spanning tree includes one or more backup links that are different from the primary links. As such, upon detection of a failure in the primary spanning tree, the system reconfigures the plurality of devices such that clock synchronization is performed according to the backup spanning tree."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Fault tolerant design for clock-synchronization systems","description":"A system is provided for synchronizing clocks. The system includes a plurality of devices in a network, each device having a local clock. The system is configured to synchronize the local clocks accor","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11463187","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11463187","citation_suggestion":"Patentable. \"Fault tolerant design for clock-synchronization systems\" (US-11463187). https://patentable.app/patents/US-11463187","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11463187","json":"https://patentable.app/api/llm-context/US-11463187","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T22:21:49.931Z"}