{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11467966","patent":{"patent_number":"US-11467966","title":"Cache memory having a programmable number of ways","assignee":null,"inventors":[],"filing_date":"2020-09-02T00:00:00.000Z","publication_date":"2022-10-11T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":14,"abstract":"A cache memory is disclosed. The cache memory includes an instruction memory portion, a tag memory portion, and one or more peripheral circuits configured to receive a CPU address corresponding with an address of the RAM memory storing a particular CPU instruction. The one or more peripheral circuits are configured to receive a way quantity indication indicating of a number of ways into which the instruction memory portion and the tag memory portion are to be subdivided, the one or more peripheral circuits are configured to identify which bits of the CPU address form the tag portion based on the way quantity indication, and the one or more peripheral circuits are configured to determine whether the particular CPU instruction is stored in the cache memory based on the identified tag portion of the CPU address and tag data stored in the cache memory."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Cache memory having a programmable number of ways","description":"A cache memory is disclosed. The cache memory includes an instruction memory portion, a tag memory portion, and one or more peripheral circuits configured to receive a CPU address corresponding with a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11467966","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11467966","citation_suggestion":"Patentable. \"Cache memory having a programmable number of ways\" (US-11467966). https://patentable.app/patents/US-11467966","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11467966","json":"https://patentable.app/api/llm-context/US-11467966","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T00:35:46.259Z"}