{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11468146","patent":{"patent_number":"US-11468146","title":"Array of integrated pixel and memory cells for deep in-sensor, in-memory computing","assignee":null,"inventors":[],"filing_date":"2019-12-06T00:00:00.000Z","publication_date":"2022-10-11T00:00:00.000Z","cpc_codes":["G06F","G11C","G06N","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G06N","G06N"],"num_claims":20,"abstract":"Disclosed are embodiments of an integrated circuit structure (e.g., a processing chip), which includes an array of integrated pixel and memory cells configured for deep in-sensor, in-memory computing (e.g., of neural networks). Each cell incorporates a memory structure (e.g., DRAM structure or a ROM structure) with a storage node, which stores a first data value (e.g., a binary weight value), and a sensor connected to a sense node, which outputs a second data value (e.g., an analog input value). Each cell is selectively operable in a functional computing mode during which the voltage level on a bit line is adjusted as a function of both the first data value and the second data value. Each cell is further selectively operable in a storage node read mode. Furthermore, depending upon the type of memory structure (e.g., a DRAM structure), each cell is selectively operable in a storage node write mode."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Array of integrated pixel and memory cells for deep in-sensor, in-memory computing","description":"Disclosed are embodiments of an integrated circuit structure (e.g., a processing chip), which includes an array of integrated pixel and memory cells configured for deep in-sensor, in-memory computing ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11468146","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11468146","citation_suggestion":"Patentable. \"Array of integrated pixel and memory cells for deep in-sensor, in-memory computing\" (US-11468146). https://patentable.app/patents/US-11468146","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11468146","json":"https://patentable.app/api/llm-context/US-11468146","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T21:55:45.562Z"}