{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11469207","patent":{"patent_number":"US-11469207","title":"Mitigating thermal impacts on adjacent stacked semiconductor devices","assignee":null,"inventors":[],"filing_date":"2020-05-11T00:00:00.000Z","publication_date":"2022-10-11T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":15,"abstract":"A semiconductor device assembly and associated methods are disclosed herein. The semiconductor device assembly includes (1) a substrate having a first side and a second side opposite the first side; (2) a first set of stacked semiconductor devices at the first side of the substrate; (3) a second set of stacked semiconductor devices adjacent to one side of the first set of stacked semiconductor devices; (4) a third set of stacked semiconductor devices adjacent to an opposite side of the first set of stacked semiconductor devices; and (5) a temperature adjusting component at the second side and aligned with the second set of stacked semiconductor devices. The temperature adjusting component is positioned to absorb the thermal energy and thereby thermally isolate the second set of stacked semiconductor devices from the first set of stacked semiconductor devices."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Mitigating thermal impacts on adjacent stacked semiconductor devices","description":"A semiconductor device assembly and associated methods are disclosed herein. The semiconductor device assembly includes (1) a substrate having a first side and a second side opposite the first side; (","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11469207","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11469207","citation_suggestion":"Patentable. \"Mitigating thermal impacts on adjacent stacked semiconductor devices\" (US-11469207). https://patentable.app/patents/US-11469207","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11469207","json":"https://patentable.app/api/llm-context/US-11469207","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:52:28.261Z"}