{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11469302","patent":{"patent_number":"US-11469302","title":"Semiconductor device including a superlattice and providing reduced gate leakage","assignee":null,"inventors":[],"filing_date":"2020-06-11T00:00:00.000Z","publication_date":"2022-10-11T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":14,"abstract":"A semiconductor device may include a semiconductor substrate, and shallow trench isolation (STI) regions in the semiconductor substrate defining an active region therebetween in the semiconductor substrate, with the active region having rounded shoulders adjacent the STI regions with an interior angle of at least 125°. The semiconductor device may further include a superlattice on the active region including stacked groups of layers, with each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may also include a semiconductor circuit on the substrate including the superlattice."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device including a superlattice and providing reduced gate leakage","description":"A semiconductor device may include a semiconductor substrate, and shallow trench isolation (STI) regions in the semiconductor substrate defining an active region therebetween in the semiconductor subs","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11469302","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11469302","citation_suggestion":"Patentable. \"Semiconductor device including a superlattice and providing reduced gate leakage\" (US-11469302). https://patentable.app/patents/US-11469302","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11469302","json":"https://patentable.app/api/llm-context/US-11469302","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T03:57:02.489Z"}