{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11469730","patent":{"patent_number":"US-11469730","title":"Circuits and methods for maintaining gain for a continuous-time linear equalizer","assignee":null,"inventors":[],"filing_date":"2020-11-16T00:00:00.000Z","publication_date":"2022-10-11T00:00:00.000Z","cpc_codes":["H04L","H04L","H04L","H04L"],"num_claims":26,"abstract":"A bias structure includes a reference voltage node connected to gate structures of a first NMOS transistor and a second NMOS transistor, a bias voltage node comprising a bias voltage, and a first op amp having a first input connected to the reference voltage, a second input connected to a drain of the first NMOS transistor, and an output connected to gate structures of a first PMOS transistor and a second PMOS transistor. The bias structure further includes a second op amp having a first input connected to the reference voltage, a second input connected to a drain of the second NMOS transistor, and an output connected to a gate structure of a third NMOS transistor and the bias voltage node. The first NMOS transistor matches a transistor of a differential pair of an integrated circuit device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Circuits and methods for maintaining gain for a continuous-time linear equalizer","description":"A bias structure includes a reference voltage node connected to gate structures of a first NMOS transistor and a second NMOS transistor, a bias voltage node comprising a bias voltage, and a first op a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11469730","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11469730","citation_suggestion":"Patentable. \"Circuits and methods for maintaining gain for a continuous-time linear equalizer\" (US-11469730). https://patentable.app/patents/US-11469730","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11469730","json":"https://patentable.app/api/llm-context/US-11469730","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T09:41:40.489Z"}