{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11469765","patent":{"patent_number":"US-11469765","title":"Multi-channel high-speed converter clock synchronization with autonomous coherent deterministic latency","assignee":null,"inventors":[],"filing_date":"2021-09-08T00:00:00.000Z","publication_date":"2022-10-11T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":19,"abstract":"A system and corresponding method that achieves coherency and deterministic latency (CDL) autonomously upon power on is disclosed. The system, for example, a multi-channel RF system, may require CDL with respect to the digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) assigned to the channels in the system. CDL is achieved through a timed combination of external reference and synchronization signals, resetting and disabling of various clock dividers, and enabling clock generation. In addition to synchronizing all of the clocks, the data acquisition sequence must be synchronized across all of the channels, whether they are on chips, cards, or chassis. Data acquisition synchronization may be implemented using an initiator/target or a wired OR mode configuration."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Multi-channel high-speed converter clock synchronization with autonomous coherent deterministic latency","description":"A system and corresponding method that achieves coherency and deterministic latency (CDL) autonomously upon power on is disclosed. The system, for example, a multi-channel RF system, may require CDL w","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11469765","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11469765","citation_suggestion":"Patentable. \"Multi-channel high-speed converter clock synchronization with autonomous coherent deterministic latency\" (US-11469765). https://patentable.app/patents/US-11469765","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11469765","json":"https://patentable.app/api/llm-context/US-11469765","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T09:20:30.122Z"}