{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11474739","patent":{"patent_number":"US-11474739","title":"Cache program operation of three-dimensional memory device with static random-access memory","assignee":null,"inventors":[],"filing_date":"2019-06-27T00:00:00.000Z","publication_date":"2022-10-18T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"Embodiments of three-dimensional (3D) memory devices with a 3D NAND memory array having a plurality of pages, an on-die cache coupled to the memory array on a same chip and configured to cache a plurality of batches of program data between a host and the memory array, the on-die cache having SRAM cells, and a controller coupled to the on-die cache on the same chip. The controller is configured to check a status of an (N−2)th batch of program data, N being an integer equal to or greater than 2, program an (N−1)th batch of program data into respective pages in the 3D NAND memory array, and cache an Nth batch of program data in respective space in the on-die cache as a backup copy of the Nth batch of program data."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Cache program operation of three-dimensional memory device with static random-access memory","description":"Embodiments of three-dimensional (3D) memory devices with a 3D NAND memory array having a plurality of pages, an on-die cache coupled to the memory array on a same chip and configured to cache a plura","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11474739","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11474739","citation_suggestion":"Patentable. \"Cache program operation of three-dimensional memory device with static random-access memory\" (US-11474739). https://patentable.app/patents/US-11474739","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11474739","json":"https://patentable.app/api/llm-context/US-11474739","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:01:00.774Z"}