{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11474746","patent":{"patent_number":"US-11474746","title":"Refresh management for DRAM","assignee":null,"inventors":[],"filing_date":"2020-12-10T00:00:00.000Z","publication_date":"2022-10-18T00:00:00.000Z","cpc_codes":["G06F","G11C","G06F","G06F"],"num_claims":20,"abstract":"A memory controller interfaces with a dynamic random access memory (DRAM). The memory controller selectively places memory commands in a memory interface queue and transmits the memory commands from the memory interface queue to a memory channel coupled to at least one dynamic random access memory (DRAM). An activate counter is maintained related to a number of activate commands sent over the memory channel to a memory region of the DRAM. In response to the activate counter being at or above a designated threshold, an arbiter is signaled that a refresh command should be sent to the memory region. In response to a designated condition, a value of the activate counter is adjusted by a total number based on a first fixed number and second varying number selected with one of random selection and pseudo-random selection."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Refresh management for DRAM","description":"A memory controller interfaces with a dynamic random access memory (DRAM). The memory controller selectively places memory commands in a memory interface queue and transmits the memory commands from t","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11474746","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11474746","citation_suggestion":"Patentable. \"Refresh management for DRAM\" (US-11474746). https://patentable.app/patents/US-11474746","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11474746","json":"https://patentable.app/api/llm-context/US-11474746","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T02:40:00.306Z"}