{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11474950","patent":{"patent_number":"US-11474950","title":"Memory controller including plurality of address mapping tables, system on chip, and electronic device","assignee":null,"inventors":[],"filing_date":"2020-08-18T00:00:00.000Z","publication_date":"2022-10-18T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":21,"abstract":"A memory controller includes a memory request queue that stores a memory request associated with a memory device including the first memory die and the second memory die having a shared channel, an address converter that selects one of first and second address mapping tables for the first memory die and the second memory die based on a bit of a physical address of the memory request and converts the physical address into a memory address based on the selected address mapping table and a physical layer that transmits the memory address to the memory device through the channel."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory controller including plurality of address mapping tables, system on chip, and electronic device","description":"A memory controller includes a memory request queue that stores a memory request associated with a memory device including the first memory die and the second memory die having a shared channel, an ad","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11474950","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11474950","citation_suggestion":"Patentable. \"Memory controller including plurality of address mapping tables, system on chip, and electronic device\" (US-11474950). https://patentable.app/patents/US-11474950","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11474950","json":"https://patentable.app/api/llm-context/US-11474950","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:00:16.658Z"}