{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11475195","patent":{"patent_number":"US-11475195","title":"Computer-implemented method and computing system for designing integrated circuit by considering timing delay","assignee":null,"inventors":[],"filing_date":"2021-01-25T00:00:00.000Z","publication_date":"2022-10-18T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":19,"abstract":"A method includes performing, using a processor, a synthesis operation to generate a netlist from input data about an integrated circuit, placing and routing, using the one processor, standard cells defining the integrated circuit using the netlist, to generate layout data and wire data, extracting, using the processor, parasitic components from the layout data, and performing, using the processor, timing analysis of the integrated circuit according to timing constraints, based on the layout data and the wire data."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Computer-implemented method and computing system for designing integrated circuit by considering timing delay","description":"A method includes performing, using a processor, a synthesis operation to generate a netlist from input data about an integrated circuit, placing and routing, using the one processor, standard cells d","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11475195","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11475195","citation_suggestion":"Patentable. \"Computer-implemented method and computing system for designing integrated circuit by considering timing delay\" (US-11475195). https://patentable.app/patents/US-11475195","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11475195","json":"https://patentable.app/api/llm-context/US-11475195","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T03:22:51.163Z"}