{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11475957","patent":{"patent_number":"US-11475957","title":"Optimized programming with a single bit per memory cell and multiple bits per memory cell","assignee":null,"inventors":[],"filing_date":"2021-01-14T00:00:00.000Z","publication_date":"2022-10-18T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"Apparatuses and techniques are described for optimizing programming in a memory device in which memory cells can be programmed using single bit per cell programming and multiple bits per cell programming. In one aspect, a single bit per cell program operation is performed which reduces damage to the memory cells as well as reducing program time. The program operation can omit a pre-charge phase and a verify phase of an initial program loop of a program operation. Instead, a program phase is performed followed by a recovery phase. In one or more subsequent program loops of the single bit per cell program operation, as well as in each program loop of a multiple bit per cell program operation, the program loop includes a pre-charge phase, a program phase, a recovery phase and a verify phase."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Optimized programming with a single bit per memory cell and multiple bits per memory cell","description":"Apparatuses and techniques are described for optimizing programming in a memory device in which memory cells can be programmed using single bit per cell programming and multiple bits per cell programm","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11475957","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11475957","citation_suggestion":"Patentable. \"Optimized programming with a single bit per memory cell and multiple bits per memory cell\" (US-11475957). https://patentable.app/patents/US-11475957","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11475957","json":"https://patentable.app/api/llm-context/US-11475957","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:38:41.367Z"}